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last updated: 2026-03-21 16:24:14

Peripheral Configuration Extraction

Extract register-level peripheral configuration procedures from STM32 reference manual and datasheet PDFs.

Universal Peripheral Initialization Pattern

Every STM32 peripheral follows this initialization order:

  1. Enable peripheral clock in RCC register (AHBxENR or APBxENR)
  2. Configure GPIO pins with correct alternate function (AF number from datasheet)
  3. Configure peripheral registers (mode, speed, protocol settings)
  4. Configure NVIC if using interrupts (priority, enable IRQ)
  5. Configure DMA if using DMA transfers (stream/channel, direction, sizes)
  6. Enable the peripheral (set enable bit in control register)

This order is critical. Accessing peripheral registers before enabling the clock causes a bus fault.

Where to Find Configuration Information

GPIO Alternate Function Mapping (Datasheet)

Glob pattern: docs/datasheet/*.pdf

  1. Read the ToC to find "Alternate function mapping" table
  2. This table shows which AF number (AF0-AF15) connects each GPIO pin to each peripheral
  3. Example: PA9 AF7 = USART1_TX, PA10 AF7 = USART1_RX
  4. This is the MOST REFERENCED table during development

Peripheral Register Descriptions (Reference Manual)

Glob pattern: docs/reference-manual/*.pdf

  1. Read ToC (pages 1-5) to find the peripheral chapter
  2. Each peripheral chapter contains:
    • Functional description (how the peripheral works)
    • Block diagram
    • Configuration procedure (step-by-step)
    • Register descriptions with bit fields
    • Timing diagrams (for communication peripherals)

RCC Clock Enable Bits (Reference Manual)

  1. Find the "RCC" chapter
  2. Look for registers: RCC_AHB1ENR, RCC_AHB2ENR, RCC_APB1ENR, RCC_APB2ENR
  3. Each register has one bit per peripheral to enable its clock
  4. Know which bus the peripheral is on (AHB1/AHB2/APB1/APB2) to find the right register

NVIC and Interrupt Vectors

  1. Find the "Interrupts and events" chapter or "NVIC" section
  2. Contains the interrupt vector table with IRQ numbers
  3. Each peripheral's chapter also lists its interrupt sources

Extraction Process

  1. Identify the peripheral to configure
  2. Read datasheet AF mapping table to find pin/AF combinations
  3. Read RM RCC chapter to find clock enable bit
  4. Read RM peripheral chapter for configuration procedure and registers
  5. If using interrupts, extract IRQ number from vector table
  6. If using DMA, extract DMA request mapping from DMA chapter
  7. Compile into step-by-step initialization sequence with register values

Peripheral-Specific Guidance

GPIO

  • Modes: Input, Output (push-pull/open-drain), Alternate Function, Analog
  • Registers: MODER, OTYPER, OSPEEDR, PUPDR, IDR, ODR, BSRR, AFRL, AFRH
  • BSRR for atomic set/reset (no read-modify-write needed)

UART/USART

  • Key registers: BRR (baud rate), CR1 (word length, parity, TX/RX enable), CR2 (stop bits), CR3 (DMA, flow control)
  • Baud rate: BRR = f_CK / baud_rate (check if oversampling by 16 or 8)
  • Enable order: configure all CR registers BEFORE enabling UE bit

SPI

  • Key registers: CR1 (master/slave, clock polarity/phase, baud prescaler), CR2 (data size, DMA, SSOE)
  • Master mode: set MSTR and SSM/SSI bits, or use hardware NSS
  • Must enable SPI (SPE bit) AFTER all configuration

I2C

  • Key registers: TIMINGR (timing), CR1 (enable, filters), CR2 (addressing, transfer config)
  • I2C timing calculation is complex - check AN4235 for timing register values
  • Enable peripheral AFTER setting timing register

ADC

  • Key registers: CR (calibration, enable), CFGR (resolution, alignment, trigger), SMPR (sampling time), SQR (sequence)
  • Calibration must be performed before first conversion
  • Sampling time affects accuracy and conversion speed

Timers

  • Key registers: CR1 (counter mode, direction), PSC (prescaler), ARR (auto-reload), CCRx (compare/capture)
  • Timer clock = APBx timer clock (see bus architecture skill for timer clock rule)
  • PWM: Configure in PWM mode 1 or 2, set CCRx for duty cycle, ARR for frequency

Output Format

## [Peripheral] Configuration

**Clock**: RCC->APB1ENR |= RCC_APB1ENR_[PERIPH]EN
**GPIO Pins**:
  - [Pin] -> AF[n] ([Function])
  - [Pin] -> AF[n] ([Function])

**Register Configuration**:
1. [Register] = [value] // [description]
2. [Register] = [value] // [description]

**NVIC** (if interrupts):
  - IRQ: [name]_IRQn (IRQ #[number])
  - Priority: [recommended]

**DMA** (if applicable):
  - DMA[n] Stream[n] Channel[n] / DMAMUX request [n]

Additional Resources

  • references/peripheral-extraction-guide.md - Detailed guide for navigating RM peripheral chapters, AF table format patterns, DMA request table locations
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